1077 search results - page 192 / 216 » Hardware code generation from dataflow programs |
104
click to vote
ICS
2001
Tsinghua U.
15 years 6 months ago
2001
Tsinghua U.
Recent proposals for Chip Multiprocessors (CMPs) advocate speculative, or implicit, threading in which the hardware employs prediction to peel off instruction sequences (i.e., imp...
119
click to vote
ISCA
2002
IEEE
15 years 1 months ago
2002
IEEE
Traditional vector architectures have shown to be very effective for regular codes where the compiler can detect data-level parallelism. However, this SIMD parallelism is also pre...
138
click to vote
HASKELL
2007
ACM
15 years 5 months ago
2007
ACM
The use of typed intermediate languages can significantly increase the reliability of a compiler. By type-checking the code produced at each transformation stage, one can identify...
JMM2
2007
15 years 1 months ago
2007
Abstract— In 2006, Gaurav Gupta and Josef Pieprzyk presented an attack on the branch-based software watermarking scheme proposed by Ginger Myles and Hongxia Jin in 2005. The softw...
124
click to vote
DAC
1997
ACM
15 years 5 months ago
1997
ACM
This paper examines the problem of statically analyzing the performance of embedded software. This problem is motivated by the increasing growth of embedded systems and a lack of ...