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» Hardware code generation from dataflow programs
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GI
2004
Springer
15 years 5 months ago
A Formal Correctness Proof for Code Generation from SSA Form in Isabelle/HOL
Abstract: Optimizations in compilers are the most error-prone phases in the compilation process. Since correct compilers are a vital precondition for software correctness, it is ne...
Jan Olaf Blech, Sabine Glesner
TAP
2008
Springer
93views Hardware» more  TAP 2008»
14 years 11 months ago
Pex-White Box Test Generation for .NET
Pex automatically produces a small test suite with high code coverage for a .NET program. To this end, Pex performs a systematic program analysis (using dynamic symbolic execution,...
Nikolai Tillmann, Jonathan de Halleux
ATVA
2010
Springer
163views Hardware» more  ATVA 2010»
14 years 12 months ago
Automatic Generation of History-Based Access Control from Information Flow Specification
This paper proposes a method for automatically inserting check statements for access control into a given recursive program according to a given security specification. A history-b...
Yoshiaki Takata, Hiroyuki Seki
CGO
2003
IEEE
15 years 5 months ago
Dynamic Trace Selection Using Performance Monitoring Hardware Sampling
Optimizing programs at run-time provides opportunities to apply aggressive optimizations to programs based on information that was not available at compile time. At run time, prog...
Howard Chen, Wei-Chung Hsu, Dong-yuan Chen
ISCAS
1999
IEEE
132views Hardware» more  ISCAS 1999»
15 years 4 months ago
Dynamic trellis diagrams for optimized DSP code generation
In this paper, we present the application of dynamic trellis diagrams (DTDs) to automatic translation of data flow graphs (DFGs) into highly optimized programs for digital signal ...
Stefan Fröhlich, Martin Gotschlich, Udo Krebe...