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» Hardware code generation from dataflow programs
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IEEEPACT
2003
IEEE
15 years 5 months ago
Compilation, Architectural Support, and Evaluation of SIMD Graphics Pipeline Programs on a General-Purpose CPU
Graphics and media processing is quickly emerging to become one of the key computing workloads. Programmable graphics processors give designers extra flexibility by running a sma...
Mauricio Breternitz Jr., Herbert H. J. Hum, Sanjee...
88
Voted
CEC
2010
IEEE
15 years 26 days ago
Evolving a CUDA kernel from an nVidia template
Rather than attempting to evolve a complete program from scratch we demonstrate genetic interface programming (GIP) by automatically generating a parallel CUDA kernel with identica...
William B. Langdon, Mark Harman
WAC
2004
Springer
150views Communications» more  WAC 2004»
15 years 5 months ago
A Systems Architecture for Sensor Networks Based On Hardware/Software Co-design
We describe the motivation and design of a novel embedded systems architecture for large networks of small devices, tha canonical example being wireless sensor networks. The archit...
Andy Nisbet, Simon Dobson
ISSS
1995
IEEE
100views Hardware» more  ISSS 1995»
15 years 3 months ago
Optimal code generation for embedded memory non-homogeneous register architectures
This paper examines the problem of code-generation for expression trees on non-homogeneous register set architectures. It proposes and proves the optimality of an O(n) algorithm f...
Guido Araujo, Sharad Malik
MICRO
1996
IEEE
173views Hardware» more  MICRO 1996»
15 years 3 months ago
Java Bytecode to Native Code Translation: The Caffeine Prototype and Preliminary Results
The Java bytecode language is emerging as a software distribution standard. With major vendors committed to porting the Java run-time environment to their platforms, programs in J...
Cheng-Hsueh A. Hsieh, John C. Gyllenhaal, Wen-mei ...