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» Hardware code generation from dataflow programs
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PPOPP
2012
ACM
13 years 9 months ago
DOJ: dynamically parallelizing object-oriented programs
We present Dynamic Out-of-Order Java (DOJ), a dynamic parallelization approach. In DOJ, a developer annotates code blocks as tasks to decouple these blocks from the parent executi...
Yong Hun Eom, Stephen Yang, James Christopher Jeni...
ICSE
2008
IEEE-ACM
16 years 2 months ago
Clone detection in automotive model-based development
Model-based development is becoming an increasingly common development methodology. In important domains like embedded systems already major parts of the code are generated from m...
Benjamin Hummel, Bernhard Schätz, Elmar J&uum...
WCRE
1997
IEEE
15 years 5 months ago
Generation of Components for Software Renovation Factories from Context-Free Grammars
We present an approach for the generation of components for a software renovation factory. These components are generated from a context-free grammar definition that recognizes t...
Mark van den Brand, M. P. A. Sellink, Chris Verhoe...
ICCAD
1994
IEEE
105views Hardware» more  ICCAD 1994»
15 years 5 months ago
Register assignment through resource classification for ASIP microcode generation
Application Specific Instruction-Set Processors (ASIPs) offer designers the ability for high-speed data and control processing with the added flexibility needed for late design sp...
Clifford Liem, Trevor C. May, Pierre G. Paulin
IWSOC
2003
IEEE
97views Hardware» more  IWSOC 2003»
15 years 6 months ago
Evaluating Template-Based Instruction Compression on Transport Triggered Architectures
In embedded systems, memory is one of the most expensive resources. Due to this, program code size has turned out to be one of the most critical design constraints. Code compressi...
Jari Heikkinen, Tommi Rantanen, Andrea G. M. Cilio...