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» Hardware code generation from dataflow programs
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IEEEPACT
2009
IEEE
14 years 11 months ago
Algorithmic Skeletons within an Embedded Domain Specific Language for the CELL Processor
Efficiently using the hardware capabilities of the Cell processor, a heterogeneous chip multiprocessor that uses several levels of parallelism to deliver high performance, and bei...
Tarik Saidani, Joel Falcou, Claude Tadonki, Lionel...
PAAPP
2006
44views more  PAAPP 2006»
15 years 1 months ago
Revisiting communication code generation algorithms for message-passing systems
In this paper, we investigate algorithms for generating communication code to run on distributedmemory systems. We modify algorithms from previously published work and prove that ...
Clayton S. Ferner
ASPLOS
2008
ACM
15 years 3 months ago
Dispersing proprietary applications as benchmarks through code mutation
Industry vendors hesitate to disseminate proprietary applications to academia and third party vendors. By consequence, the benchmarking process is typically driven by standardized...
Luk Van Ertvelde, Lieven Eeckhout
IEEEPACT
2005
IEEE
15 years 7 months ago
Extended Whole Program Paths
We describe the design, generation and compression of the extended whole program path (eWPP) representation that not only captures the control flow history of a program execution...
Sriraman Tallam, Rajiv Gupta, Xiangyu Zhang
ATAL
2008
Springer
15 years 3 months ago
A heads-up no-limit Texas Hold'em poker player: discretized betting models and automatically generated equilibrium-finding progr
We present Tartanian, a game theory-based player for headsup no-limit Texas Hold'em poker. Tartanian is built from three components. First, to deal with the virtually infinit...
Andrew Gilpin, Tuomas Sandholm, Troels Bjerre S&os...