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ARC
2010
Springer
183views Hardware» more  ARC 2010»
15 years 1 months ago
Integrated Design Environment for Reconfigurable HPC
Using FPGAs to accelerate High Performance Computing (HPC) applications is attractive, but has a huge associated cost: the time spent, not for developing efficient FPGA code but fo...
Lilian Janin, Shoujie Li, Doug Edwards
132
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CODES
2010
IEEE
14 years 11 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
ASIACRYPT
2007
Springer
15 years 7 months ago
Symmetric Key Cryptography on Modern Graphics Hardware
Abstract. GPUs offer a tremendous amount of computational bandwidth that was until now largely unusable for cryptographic computations due to a lack of integer arithmetic and user...
Jason Yang, James Goodman
SAC
2008
ACM
15 years 1 months ago
Optimizing code through iterative specialization
Code specialization is a way to obtain significant improvement in the performance of an application. It works by exposing values of different parameters in source code. The availa...
Minhaj Ahmad Khan, Henri-Pierre Charles, Denis Bar...
ISCA
2010
IEEE
219views Hardware» more  ISCA 2010»
15 years 6 months ago
Using hardware vulnerability factors to enhance AVF analysis
Fault tolerance is now a primary design constraint for all major microprocessors. One step in determining a processor’s compliance to its failure rate target is measuring the Ar...
Vilas Sridharan, David R. Kaeli