1077 search results - page 59 / 216 » Hardware code generation from dataflow programs |
122
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PLDI
1995
ACM
15 years 5 months ago
1995
ACM
Traditional list schedulers order instructions based on an optimistic estimate of the load latency imposed by the hardware and therefore cannot respond to variations in memory lat...
101
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ETS
2006
IEEE
15 years 7 months ago
2006
IEEE
A central problem in built-in self test (BIST) is how to efficiently generate a small set of test vectors that detect all targeted faults. We propose a novel solution that uses l...
129
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CBSE
2005
Springer
15 years 7 months ago
2005
Springer
We consider a class of component-based software models with interaction style of buffered asynchronous message passing between components with ports, represented by UML-RT. After ...
ECBS
2005
IEEE
15 years 3 months ago
2005
IEEE
Monitoring critical events such as constraints violations is one of the key issues of Autonomic Systems. This paper presents an interceptor based approach of constraint violation ...
110
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CASES
2001
ACM
15 years 5 months ago
2001
ACM
Synchronous programming languages have proved to be advantageous for designing software and hardware for embedded systems. Despite their clear semantics, their compilation is rema...