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» Hardware code generation from dataflow programs
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ISQED
2002
IEEE
203views Hardware» more  ISQED 2002»
15 years 2 months ago
Automatic Test Program Generation from RT-Level Microprocessor Descriptions
The paper addresses the issue of microprocessor and microcontroller testing, and follows an approach based on the generation of a test program. The proposed method relies on two p...
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...
CGO
2008
IEEE
14 years 11 months ago
Comprehensive path-sensitive data-flow analysis
Data-flow analysis is an integral part of any aggressive optimizing compiler. We propose a framework for improving the precision of data-flow analysis in the presence of complex c...
Aditya V. Thakur, R. Govindarajan
CC
2008
Springer
130views System Software» more  CC 2008»
14 years 11 months ago
IDE Dataflow Analysis in the Presence of Large Object-Oriented Libraries
Abstract. A key scalability challenge for interprocedural dataflow analysis comes from large libraries. Our work addresses this challenge for the general category of interprocedura...
Atanas Rountev, Mariana Sharp, Guoqing Xu
DATE
2005
IEEE
169views Hardware» more  DATE 2005»
15 years 3 months ago
Optimized Generation of Data-Path from C Codes for FPGAs
Zhi Guo, Betul Buyukkurt, Walid A. Najjar, Kees A....
DATE
2010
IEEE
153views Hardware» more  DATE 2010»
15 years 2 months ago
Recursion-driven parallel code generation for multi-core platforms
—We present Huckleberry, a tool for automatically generating parallel implementations for multi-core platforms from sequential recursive divide-and-conquer programs. The recursiv...
Rebecca L. Collins, Bharadwaj Vellore, Luca P. Car...