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» Hardware code generation from dataflow programs
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121
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ICCS
2005
Springer
15 years 7 months ago
Performance and Scalability Analysis of Cray X1 Vectorization and Multistreaming Optimization
Cray X1 Fortran and C/C++ compilers provide a number of loop transformations, notably vectorization and multistreaming, in order to exploit the multistreaming processor (MSP) hard...
Sadaf R. Alam, Jeffrey S. Vetter
CORR
2011
Springer
259views Education» more  CORR 2011»
14 years 8 months ago
Automatic Optimization for MapReduce Programs
The MapReduce distributed programming framework has become popular, despite evidence that current implementations are inefficient, requiring far more hardware than a traditional r...
Eaman Jahani, Michael J. Cafarella, Christopher R&...
123
Voted
HPCC
2007
Springer
15 years 5 months ago
Checkpointing Aided Parallel Execution Model and Analysis
Abstract. Checkpointing techniques are usually used to secure the execution of sequential and parallel programs. However, they can also be used in order to generate automatically a...
Laura Mereuta, Éric Renault
126
Voted
GECCO
2000
Springer
158views Optimization» more  GECCO 2000»
15 years 5 months ago
Grammar based function definition in Grammatical Evolution
We describe the use of grammars as an approach to automatic function definition in Grammatical Evolution. The automatic generation of functions allows the evolution of both the fu...
Michael O'Neill, Conor Ryan
HICSS
2000
IEEE
110views Biometrics» more  HICSS 2000»
15 years 6 months ago
Reverse Compilation for Digital Signal Processors: A Working Example
We describe the implementation and use of a reverse compiler from Analog Devices 21xx assembler source to ANSI-C with optional use of the language extensions for the TMS320C6x pr...
Adrian Johnstone, Elizabeth Scott, Tim Womack