As the portion of coupling capacitance increases in smaller process geometries, accurate coupled noise analysis is becoming more important in current design methodologies. We prop...
Jae-Seok Yang, Jeong-Yeol Kim, Joon-Ho Choi, Moon-...
Dynamic run-time scheduling in System-on-Chip platforms has become recently an active area of research because of the performance and power requirements of new applications. Moreo...
In this paper, we introduce a discrete-time model for the complete power supply sub-system that closely approximates the behavior of its circuit-level (i.e., HSpice), continuous-t...
Luca Benini, Giuliano Castelli, Alberto Macii, Enr...
Most existing RCL−1 circuit reductions stamp inverse inductance L−1 elements by a second-order nodal analysis (NA). The NA formulation uses nodal voltage variables and describ...
Embedded system optimization typically considers objectives such as cost, timing, buffer sizes and power consumption. Robustness criteria, i.e. sensitivity of the system to variat...