In this work, we parameterize and explore the interconnect structure of pipelined FPGAs. Specifically, we explore the effects of interconnect register population, length of regist...
Akshay Sharma, Katherine Compton, Carl Ebeling, Sc...
In this paper we describe a new technique, called pipeline spectroscopy, and use it to measure the cost of each cache miss. The cost of a miss is displayed (graphed) as a histogra...
Thomas R. Puzak, Allan Hartstein, Philip G. Emma, ...
Hardware trends suggest that large-scale CMP architectures, with tens to hundreds of processing cores on a single piece of silicon, are iminent within the next decade. While exist...
Bratin Saha, Ali-Reza Adl-Tabatabai, Anwar M. Ghul...
The paper deals with the development of the informational since the IFIP '71 Congress in Ljubljana when the new consciousness evolved to the necessity of nowadays information...
Recent analytical and experimental work demonstrate that IEEE 802.11-based wireless mesh networks are prone to turbulence. Manifestations of such turbulence take the form of large...
Adel Aziz, David Starobinski, Patrick Thiran, Alae...