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» Hardware design experiences in ZebraNet
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RAS
2008
108views more  RAS 2008»
14 years 9 months ago
Towards long-lived robot genes
Robot projects are often evolutionary dead ends, with the software and hardware they produce disappearing without trace afterwards. Common causes include dependencies on uncommon ...
Paul M. Fitzpatrick, Giorgio Metta, Lorenzo Natale
TVLSI
2010
14 years 4 months ago
C-Pack: A High-Performance Microprocessor Cache Compression Algorithm
Microprocessor designers have been torn between tight constraints on the amount of on-chip cache memory and the high latency of off-chip memory, such as dynamic random access memor...
Xi Chen, Lei Yang, Robert P. Dick, Li Shang, Haris...
ASPLOS
2012
ACM
13 years 5 months ago
Chameleon: operating system support for dynamic processors
The rise of multi-core processors has shifted performance efforts towards parallel programs. However, single-threaded code, whether from legacy programs or ones difficult to para...
Sankaralingam Panneerselvam, Michael M. Swift
CF
2005
ACM
14 years 11 months ago
A case for a working-set-based memory hierarchy
Modern microprocessor designs continue to obtain impressive performance gains through increasing clock rates and advances in the parallelism obtained via micro-architecture design...
Steve Carr, Soner Önder
PFE
2001
Springer
15 years 2 months ago
Introducing Product Lines in Small Embedded Systems
: How do you introduce product lines into a hardware dominated organization that has increasing software architecture awareness and products with extremely limited memory resources...
Christoph Stoermer, Markus Roeddiger