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FPL
2007
Springer
106views Hardware» more  FPL 2007»
15 years 4 months ago
RAMP Blue: A Message-Passing Manycore System in FPGAs
We are developing a set of reusable design blocks and several prototype systems for emulation of multi-core architectures in FPGAs. RAMP Blue is the first of these prototypes and...
Alex Krasnov, Andrew Schultz, John Wawrzynek, Greg...
FCCM
2006
IEEE
101views VLSI» more  FCCM 2006»
15 years 3 months ago
A Type Architecture for Hybrid Micro-Parallel Computers
Recently, platform FPGAs that integrate sequential processors with a spatial fabric have become prevalent. While these hybrid architectures ease the burden of integrating sequenti...
Benjamin Ylvisaker, Brian Van Essen, Carl Ebeling
ISQED
2005
IEEE
140views Hardware» more  ISQED 2005»
15 years 3 months ago
Toward Quality EDA Tools and Tool Flows Through High-Performance Computing
As the scale and complexity of VLSI circuits increase, Electronic Design Automation (EDA) tools become much more sophisticated and are held to increasing standards of quality. New...
Aaron N. Ng, Igor L. Markov
MOBICOM
2012
ACM
13 years 9 days ago
Distinguishing users with capacitive touch communication
As we are surrounded by an ever-larger variety of post-PC devices, the traditional methods for identifying and authenticating users have become cumbersome and time-consuming. In t...
Tam Vu, Akash Baid, Simon Gao, Marco Gruteser, Ric...
DATE
2009
IEEE
125views Hardware» more  DATE 2009»
15 years 4 months ago
HLS-l: High-level synthesis of high performance latch-based circuits
An inherent performance gap between custom designs and ASICs is one of the reasons why many designers still start their designs from register transfer level (RTL) description rath...
Seungwhun Paik, Insup Shin, Youngsoo Shin