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» Hardware design experiences in ZebraNet
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DATE
2002
IEEE
83views Hardware» more  DATE 2002»
15 years 2 months ago
Memory System Connectivity Exploration
In programmable embedded systems, the memory subsystem represents a major cost, performance and power bottleneck. To optimize the system for such different goals, the designer wou...
Peter Grun, Nikil D. Dutt, Alexandru Nicolau
ICRA
1998
IEEE
132views Robotics» more  ICRA 1998»
15 years 2 months ago
A 3-D Self-Reconfigurable Structure
: A three-dimensional, self-reconfigurable structure is proposed. The structure is a fully distributed system composed of many identical 3-D units. Each unit has functions of chang...
Satoshi Murata, Haruhisa Kurokawa, Eiichi Yoshida,...
KDD
2000
ACM
121views Data Mining» more  KDD 2000»
15 years 1 months ago
Mining high-speed data streams
Many organizations today have more than very large databases; they have databases that grow without limit at a rate of several million records per day. Mining these continuous dat...
Pedro Domingos, Geoff Hulten
SIGCOMM
2010
ACM
14 years 10 months ago
Scalable flow-based networking with DIFANE
Ideally, enterprise administrators could specify fine-grain policies that drive how the underlying switches forward, drop, and measure traffic. However, existing techniques for fl...
Minlan Yu, Jennifer Rexford, Michael J. Freedman, ...
CCR
2004
103views more  CCR 2004»
14 years 9 months ago
Reconsidering wireless systems with multiple radios
The tremendous popularity of wireless systems in recent years has led to the commoditization of RF transceivers (radios) whose prices have fallen dramatically. The lower cost allo...
Paramvir Bahl, Atul Adya, Jitendra Padhye, Alec Wo...