421 search results - page 35 / 85 » Hardware efficient architectures for Eigenvalue computation |
121
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EUROPAR
2009
Springer
15 years 1 months ago
2009
Springer
Abstract. In the field of HPC, the current hardware trend is to design multiprocessor architectures that feature heterogeneous technologies such as specialized coprocessors (e.g., ...
123
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FPL
2010
Springer
14 years 7 months ago
2010
Springer
We demonstrate how Field Programmable Gate Arrays (FPGAs) may be used to address the computing challenges associated with assembling genome sequences from recent ultra-high-through...
MICRO
2008
IEEE
15 years 4 months ago
2008
IEEE
—Caches ideally should have low miss rates and short access times, and should be power efficient at the same time. Such design goals are often contradictory in practice. Recent f...
DAC
2006
ACM
15 years 10 months ago
2006
ACM
Scheduling plays a central role in the behavioral synthesis process, which automatically compiles high-level specifications into optimized hardware implementations. However, most ...
110
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ISLPED
2010
ACM
14 years 7 months ago
2010
ACM
DRAM power and energy efficiency considerations are becoming increasingly important for low-power and mobile systems. Using lower power modes provided by commodity DRAM chips redu...