421 search results - page 36 / 85 » Hardware efficient architectures for Eigenvalue computation |
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FPL
2006
Springer
15 years 1 months ago
2006
Springer
The recent development of Platform-FPGA or FieldProgrammable System-on-Chip architectures, with immersed coarse-grain processors, embedded memories and IP cores, offers the potent...
FPL
2000
Springer
15 years 1 months ago
2000
Springer
Coarse-grain reconfigurable architectures have been a matter of intense research in the last few years. They promise to be more adequate for computational tasks due to their better...
ISPAN
2000
IEEE
15 years 2 months ago
2000
IEEE
We present new architectural concepts for uniprocessor designs that conform to the data-driven computation paradigm. Usage of our D2 -CPU (Data-Driven processor) follows the natura...
DATE
2006
IEEE
15 years 3 months ago
2006
IEEE
NoC architectures can be adopted to support general communications among multiple IPs over multi-processor Systems on Chip (SoCs). In this work we illustrate the modeling and simu...
DSD
2003
IEEE
15 years 3 months ago
2003
IEEE
Network on Chip (NoC) is a new paradigm for designing core based System on Chip which supports high degree of reusability and is scalable. In this paper we describe an efficient t...