Sciweavers

421 search results - page 37 / 85
» Hardware efficient architectures for Eigenvalue computation
Sort
View
ICCD
2008
IEEE
136views Hardware» more  ICCD 2008»
15 years 6 months ago
A resource efficient content inspection system for next generation Smart NICs
— The aggregate power consumption of the Internet is increasing at an alarming rate, due in part to the rapid increase in the number of connected edge devices such as desktop PCs...
Karthik Sabhanatarajan, Ann Gordon-Ross
DATE
2008
IEEE
107views Hardware» more  DATE 2008»
15 years 4 months ago
Instruction Set Extension Exploration in Multiple-Issue Architecture
To satisfy high-performance computing demand in modern embedded devices, current embedded processor architectures provide designer with possibility either to define customized ins...
I-Wei Wu, Zhi-Yuan Chen, Jean Jyh-Jiun Shann, Chun...
ICIP
2009
IEEE
15 years 11 months ago
Memory-less Bit-plane Coder Architecture For Jpeg2000 With Concurrent Column-stripe Coding
In implementing an efficient block coder for JPEG2000, the memories required for storing the state variables dominate the hardware cost of a block coder. In this paper, we propose...
ICCAD
2004
IEEE
147views Hardware» more  ICCAD 2004»
15 years 6 months ago
Interval-valued reduced order statistical interconnect modeling
9, IO]. However, unlike the case with static timing, it is not so easy We show how recent advances in the handling of correlated interval representations of range uncertainty can b...
James D. Ma, Rob A. Rutenbar
ISCA
2002
IEEE
174views Hardware» more  ISCA 2002»
14 years 9 months ago
Efficient Task Partitioning Algorithms for Distributed Shared Memory Systems
In this paper, we consider the tree task graphs which arise from many important programming paradigms such as divide and conquer, branch and bound etc., and the linear task-graphs...
Sibabrata Ray, Hong Jiang