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» Hardware efficient architectures for Eigenvalue computation
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DAC
2010
ACM
15 years 4 months ago
Virtual channels vs. multiple physical networks: a comparative analysis
Packet-switched networks-on-chip (NoC) have been proposed as an efficient communication infrastructure for multi-core architectures. Adding virtual channels to a NoC helps to avoi...
Young-Jin Yoon, Nicola Concer, Michele Petracca, L...
DAC
2009
ACM
16 years 4 months ago
Efficient SAT solving for non-clausal formulas using DPLL, graphs, and watched cuts
Boolean satisfiability (SAT) solvers are used heavily in hardware and software verification tools for checking satisfiability of Boolean formulas. Most state-of-the-art SAT solver...
Himanshu Jain, Edmund M. Clarke
FAST
2004
15 years 5 months ago
Diamond: A Storage Architecture for Early Discard in Interactive Search
This paper explores the concept of early discard for interactive search of unindexed data. Processing data inside storage devices using downloaded searchlet code enables Diamond t...
Larry Huston, Rahul Sukthankar, Rajiv Wickremesing...
AES
2005
Springer
137views Cryptology» more  AES 2005»
15 years 3 months ago
Design of a multimedia processor based on metrics computation
Media-processing applications, such as signal processing, 2D and 3D graphics rendering, and image compression, are the dominant workloads in many embedded systems today. The real-...
Nader Ben Amor, Yannick Le Moullec, Jean-Philippe ...
HPCA
2008
IEEE
16 years 4 months ago
Power-Efficient DRAM Speculation
Power-Efficient DRAM Speculation (PEDS) is a power optimization targeted at broadcast-based sharedmemory multiprocessor systems that speculatively access DRAM in parallel with the...
Nidhi Aggarwal, Jason F. Cantin, Mikko H. Lipasti,...