421 search results - page 47 / 85 » Hardware efficient architectures for Eigenvalue computation |
103
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VLSID
2007
IEEE
15 years 10 months ago
2007
IEEE
Title of thesis: EFFICIENT AND ACCURATE STATISTICAL TIMING ANALYSIS FOR NON-LINEAR NON-GAUSSIAN VARIABILITY WITH INCREMENTAL ATTRIBUTES Ashish Dobhal, Master of Science, 2006 Thes...
ICON
2007
IEEE
15 years 4 months ago
2007
IEEE
— Security is paramount in Mobile Ad-hoc Networks (MANET) as they are not conducive to centralized trusted authorities. Several solutions have been proposed MANET in the areas of...
155
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APSCC
2010
IEEE
14 years 7 months ago
2010
IEEE
Middleware for web service orchestration, such as runtime engines for executing business processes, workflows, or web service compositions, can easily become performance bottleneck...
100
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IPPS
2010
IEEE
14 years 7 months ago
2010
IEEE
Multi-pattern string matching remains a major performance bottleneck in network intrusion detection and anti-virus systems for high-speed deep packet inspection (DPI). Although Aho...
MICRO
2000
IEEE
14 years 9 months ago
2000
IEEE
This paper demonstrates how an Instruction Path Coprocessor (I-COP) can be efficiently implemented using the PipeRench reconfigurable architecture. An I-COP is a programmable on-c...