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» Hardware efficient architectures for Eigenvalue computation
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IPPS
2003
IEEE
15 years 3 months ago
A GRASP-Based Algorithm for Solving DVE Partitioning Problem
Graphic cards performance increase and fast Internet connections are popularising Networked Virtual Environments. This immature paradigm of real-time applications has still to sol...
Pedro Morillo, Marcos Fernández
CF
2006
ACM
15 years 3 months ago
A nano-scale reconfigurable mesh with spin waves
In this paper, we present a nano-scale reconfigurable mesh that is interconnected with ferromagnetic spin-wave buses. The architecture described here, while requiring the same num...
Mary Mehrnoosh Eshaghian-Wilner, Alexander Khitun,...
FPL
2006
Springer
161views Hardware» more  FPL 2006»
15 years 1 months ago
Predictive Load Balancing for Interconnected FPGAs
A Field Programmable Gate Array (FPGA), when used as a platform for implementing special-purpose computing architectures, offers the potential for increased functional parallelism...
Jason D. Bakos, Charles L. Cathey, Allen Michalski
APIN
1999
107views more  APIN 1999»
14 years 9 months ago
Massively Parallel Probabilistic Reasoning with Boltzmann Machines
We present a method for mapping a given Bayesian network to a Boltzmann machine architecture, in the sense that the the updating process of the resulting Boltzmann machine model pr...
Petri Myllymäki
NETWORK
2007
100views more  NETWORK 2007»
14 years 9 months ago
Parallel Programmable Ethernet Controllers: Performance and Security
Programmable network interfaces can provide network servers with a flexible interface to high-bandwidth Ethernet links, but they face critical software and architectural challenge...
Derek L. Schuff, Vijay S. Pai, Paul Willmann, Scot...