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» Hardware efficient architectures for Eigenvalue computation
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CODES
2005
IEEE
15 years 3 months ago
Future processors: flexible and modular
The ability to continue increasing processor frequency and single thread performance is being severely limited by exponential increases in leakage and active power. To continue to...
Charlie Johnson, Jeff Welser
FPL
2004
Springer
101views Hardware» more  FPL 2004»
15 years 3 months ago
Automatic Creation of Reconfigurable PALs/PLAs for SoC
Many System-on-a-Chip devices would benefit from the inclusion of reprogrammable logic on the silicon die, as it can add general computing ability, provide run -time reconfigurabil...
Mark Holland, Scott Hauck
DAC
2004
ACM
15 years 10 months ago
Synthesizing interconnect-efficient low density parity check codes
Error correcting codes are widely used in communication and storage applications. Codec complexity has usually been measured with a software implementation in mind. A recent hardw...
Marghoob Mohiyuddin, Amit Prakash, Adnan Aziz, Way...
DAC
2004
ACM
15 years 10 months ago
Multiple constant multiplication by time-multiplexed mapping of addition chains
An important primitive in the hardware implementations of linear DSP transforms is a circuit that can multiply an input value by one of several different preset constants. We prop...
James C. Hoe, Markus Püschel, Peter Tummeltsh...
EGH
2004
Springer
15 years 3 months ago
A programmable vertex shader with fixed-point SIMD datapath for low power wireless applications
The real time 3D graphics becomes one of the attractive applications for 3G wireless terminals although their battery lifetime and memory bandwidth limit the system resources for ...
Ju-Ho Sohn, Ramchan Woo, Hoi-Jun Yoo