Sciweavers

421 search results - page 60 / 85
» Hardware efficient architectures for Eigenvalue computation
Sort
View
DAC
2008
ACM
15 years 10 months ago
DVFS in loop accelerators using BLADES
Hardware accelerators are common in embedded systems that have high performance requirements but must still operate within stringent energy constraints. To facilitate short time-t...
Ganesh S. Dasika, Shidhartha Das, Kevin Fan, Scott...
SBACPAD
2007
IEEE
91views Hardware» more  SBACPAD 2007»
15 years 4 months ago
Impacts of Multiprocessor Configurations on Workloads in Bioinformatics
Bioinformatics is among the most active research areas in computer science. In this study, we investigate a suite of workloads in bioinformatics on two multiprocessor systems with...
Youfeng Wu, Mauricio Breternitz Jr., Victor Ying
ATS
2005
IEEE
98views Hardware» more  ATS 2005»
15 years 3 months ago
Untestable Multi-Cycle Path Delay Faults in Industrial Designs
The need for high-performance pipelined architectures has resulted in the adoption of latch based designs with multiple, interacting clocks. For such designs, time sharing across ...
Manan Syal, Michael S. Hsiao, Suriyaprakash Natara...
DSD
2008
IEEE
139views Hardware» more  DSD 2008»
14 years 11 months ago
Revisiting the Cache Effect on Multicore Multithreaded Network Processors
Caching mechanism has achieved great success in general purpose processor; however, its deployment in Network Processor (NP) raises questions over its effectiveness under the new ...
Zhen Liu, Jia Yu, Xiaojun Wang, Bin Liu, Laxmi N. ...
HPCA
2003
IEEE
15 years 10 months ago
Dynamic Data Dependence Tracking and its Application to Branch Prediction
To continue to improve processor performance, microarchitects seek to increase the effective instruction level parallelism (ILP) that can be exploited in applications. A fundament...
Lei Chen, Steve Dropsho, David H. Albonesi