421 search results - page 63 / 85 » Hardware efficient architectures for Eigenvalue computation |
HPCA
2006
IEEE
15 years 10 months ago
2006
IEEE
Simulation is an important means of evaluating new microarchitectures. Current trends toward chip multiprocessors (CMPs) try the ability of designers to develop efficient simulato...
ANCS
2007
ACM
15 years 1 months ago
2007
ACM
Programming specialized network processors (NPU) is inherently difficult. Unlike mainstream processors where architectural features such as out-of-order execution and caches hide ...
DATE
2009
IEEE
15 years 4 months ago
2009
IEEE
— Today's innovations in the automotive sector are, to a great extent, based on electronics. The increasing integration complexity and stringent cost reduction goals turn E/...
ATS
2004
IEEE
15 years 1 months ago
2004
IEEE
1 This paper describes a heuristic for system-on-chip test scheduling in an abort-on-fail context, where the test is terminated as soon as a defect is detected. We consider an hybr...
ASPDAC
2008
ACM
14 years 11 months ago
2008
ACM
In this paper, we present the complete design and architectural details of MAIZEROUTER. MAIZEROUTER reflects a significant leap in progress over existing publicly available routing...