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CTRSA
2001
Springer
140views Cryptology» more  CTRSA 2001»
13 years 8 months ago
Fast Implementation and Fair Comparison of the Final Candidates for Advanced Encryption Standard Using Field Programmable Gate A
The results of fast implementations of all five AES final candidates using Virtex Xilinx Field Programmable Gate Arrays are presented and analyzed. Performance of several alternati...
Kris Gaj, Pawel Chodowiec
ARC
2009
Springer
241views Hardware» more  ARC 2009»
13 years 11 months ago
Fully Pipelined Hardware Implementation of 128-Bit SEED Block Cipher Algorithm
As the need for information security increases in our everyday life, the job of encoding/decoding for secure information delivery becomes a critical issue in data network systems. ...
Jaeyoung Yi, Karam Park, Joonseok Park, Won Woo Ro
FC
1997
Springer
86views Cryptology» more  FC 1997»
13 years 8 months ago
The SPEED Cipher
Abstract. SPEED is a private key block cipher. It supports three variable parameters: (1) data length — the length of a plaintext/ciphertext of SPEED can be 64, 128 or 256 bits. ...
Yuliang Zheng
USS
2008
13 years 6 months ago
Practical Symmetric Key Cryptography on Modern Graphics Hardware
Graphics processors are continuing their trend of vastly outperforming CPUs while becoming more general purpose. The latest generation of graphics processors have introduced the a...
Owen Harrison, John Waldron
ISJGP
2010
13 years 1 months ago
On the Hardware Implementation Cost of Crypto-Processors Architectures
A variety of modern technologies such as networks, Internet, and electronic services demand private and secure communications for a great number of everyday transactions. Security ...
Nicolas Sklavos