355 search results - page 16 / 71 » Hardware implementation of a novel genetic algorithm |
FCCM
2005
IEEE
15 years 3 months ago
2005
IEEE
In many image processing applications, fast convolution of an image with a large 2D filter is required. Field Programable Gate Arrays (FPGAs) are often used to achieve this goal ...
101
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ISCAS
2005
IEEE
15 years 3 months ago
2005
IEEE
Abstract— In many image processing applications, fast convolution of an image with a large 2D filter is required. Field Programable Gate Arrays (FPGAs) are often used to achieve...
88
Voted
MICRO
2010
IEEE
14 years 4 months ago
2010
IEEE
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
108
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ASPDAC
2006
ACM
15 years 1 months ago
2006
ACM
A novel algorithm for object tracking in video pictures, based on image segmentation and pattern matching, as well as its FPGA/ASIC implementation architecture are presented. With ...
101
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GECCO
2008
Springer
14 years 10 months ago
2008
Springer
The choice of an appropriate hardware representation model is key to successful evolution of digital circuits. One of the most popular models is cartesian genetic programming, whi...