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DAC
2011
ACM
13 years 9 months ago
AENEID: a generic lithography-friendly detailed router based on post-RET data learning and hotspot detection
In the era of deep sub-wavelength lithography for nanometer VLSI designs, manufacturability and yield issues are critical and need to be addressed during the key physical design i...
Duo Ding, Jhih-Rong Gao, Kun Yuan, David Z. Pan
INFOCOM
2012
IEEE
13 years 1 days ago
Cuckoo sampling: Robust collection of flow aggregates under a fixed memory budget
—Collecting per-flow aggregates in high-speed links is challenging and usually requires traffic sampling to handle peak rates and extreme traffic mixes. Static selection of sa...
Josep Sanjuàs-Cuxart, Pere Barlet-Ros, Nick...
ICCAD
1999
IEEE
86views Hardware» more  ICCAD 1999»
15 years 1 months ago
Clock skew scheduling for improved reliability via quadratic programming
This paper considers the problem of determining an optimal clock skew schedule for a synchronous VLSI circuit. A novel formulation of clock skew scheduling as a constrained quadrat...
Ivan S. Kourtev, Eby G. Friedman
ISPD
1997
ACM
68views Hardware» more  ISPD 1997»
15 years 1 months ago
Faster minimization of linear wirelength for global placement
A linear wirelength objective more e ectively captures timing, congestion, and other global placement considerations than a squared wirelength objective. The GORDIAN-L cell placem...
Charles J. Alpert, Tony F. Chan, Dennis J.-H. Huan...
CODES
2005
IEEE
15 years 3 months ago
Power-smart system-on-chip architecture for embedded cryptosystems
In embedded cryptosystems, sensitive information can leak via timing, power, and electromagnetic channels. We introduce a novel power-smart system-on-chip architecture that provid...
Radu Muresan, Haleh Vahedi, Y. Zhanrong, Stefano G...