Sciweavers

58 search results - page 3 / 12
» Hardware implementation of evolutionary digital filters
Sort
View
TCAD
2002
139views more  TCAD 2002»
13 years 6 months ago
Digital filter synthesis based on an algorithm to generate all minimal signed digit representations
In this paper, the authors propose an algorithm to find all the minimal signed digit (MSD) representations of a constant and present an algorithm to synthesize digital filters base...
In-Cheol Park, Hyeong-Ju Kang
ISCAS
2005
IEEE
132views Hardware» more  ISCAS 2005»
13 years 12 months ago
A high performance distributed-parallel-processor architecture for 3D IIR digital filters
—Real-time spatio-temporal VLSI 3D IIR digital filters may be used for imaging or beamforming applications employing 3D input signals from synchronously-sampled multi-sensor arra...
Arjuna Madanayake, Leonard T. Bruton
GECCO
2007
Springer
138views Optimization» more  GECCO 2007»
14 years 15 days ago
Reducing the number of transistors in digital circuits using gate-level evolutionary design
This paper shows that the evolutionary design of digital circuits which is conducted at the gate level is able to produce human-competitive circuits at the transistor level. In ad...
Zbysek Gajda, Lukás Sekanina
ISCAS
1999
IEEE
116views Hardware» more  ISCAS 1999»
13 years 10 months ago
A coefficient segmentation algorithm for low power implementation of FIR filters
The authors present a multiplication algorithm for low power implementation of digital filters on CMOS based digital signal processing systems. The algorithm decomposes individual...
Ahmet T. Erdogan, Tughrul Arslan
ICES
2005
Springer
138views Hardware» more  ICES 2005»
13 years 12 months ago
A Flexible On-Chip Evolution System Implemented on a Xilinx Virtex-II Pro Device
Abstract. There have been introduced a number of systems with evolvable hardware on a single chip. To overcome the lack of flexibility in these systems, we propose a single-chip e...
Kyrre Glette, Jim Torresen