Sciweavers

1118 search results - page 104 / 224
» Hardware interface design for real time embedded systems
Sort
View
CORR
2006
Springer
116views Education» more  CORR 2006»
14 years 10 months ago
Memory Aware High-Level Synthesis for Embedded Systems
We introduce a new approach to take into account the memory architecture and the memory mapping in the High- Level Synthesis of Real-Time embedded systems. We formalize the memory...
Gwenolé Corre, Eric Senn, Nathalie Julien, ...
CVPR
1998
IEEE
15 years 12 months ago
Real-Time 2-D Feature Detection on a Reconfigurable Computer
We have designed and implemented a system for real-time detection of 2-D features on a reconfigurable computer based on Field Programmable Gate Arrays (FPGA `s). We envision this ...
Arrigo Benedetti, Pietro Perona
WCE
2007
14 years 11 months ago
High-Performance Multigrid Solvers in Reconfigurable Hardware
—Partial Differential Equations (PDEs) play an essential role in modeling real world problems. The broad field of modeling such systems has drawn the researchers’ attention for...
Safaa J. Kasbah, Issam W. Damaj
DATE
2007
IEEE
99views Hardware» more  DATE 2007»
15 years 4 months ago
Very wide register: an asymmetric register file organization for low power embedded processors
In current embedded systems processors, multi-ported register files are one of the most power hungry parts of the processor, even when they are clustered. This paper presents a n...
Praveen Raghavan, Andy Lambrechts, Murali Jayapala...
CODES
2009
IEEE
15 years 4 months ago
A standby-sparing technique with low energy-overhead for fault-tolerant hard real-time systems
Time redundancy (rollback-recovery) and hardware redundancy are commonly used in real-time systems to achieve fault tolerance. From an energy consumption point of view, time redun...
Alireza Ejlali, Bashir M. Al-Hashimi, Petru Eles