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» Hardware interface design for real time embedded systems
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ISSS
2002
IEEE
139views Hardware» more  ISSS 2002»
15 years 2 months ago
Multiprocessor Mapping of Process Networks: A JPEG Decoding Case Study
We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a ...
Erwin A. de Kock
ISCAS
2007
IEEE
123views Hardware» more  ISCAS 2007»
15 years 4 months ago
Evaluating Network-on-Chip for Homogeneous Embedded Multiprocessors in FPGAs
— This paper presents performance and area evaluation of a homogeneous multiprocessor communication system based on network-on-chip (NoC) in FPGA platforms. Two homogenous chip m...
Henrique C. Freitas, Dalton M. Colombo, Fernanda L...
SIES
2008
IEEE
15 years 4 months ago
Performance evaluation of a java chip-multiprocessor
—Chip multiprocessing design is an emerging trend for embedded systems. In this paper, we introduce a Java multiprocessor system-on-chip called JopCMP. It is a symmetric shared-m...
Christof Pitter, Martin Schoeberl
DATE
2006
IEEE
113views Hardware» more  DATE 2006»
15 years 4 months ago
Automatic ADL-based operand isolation for embedded processors
Cutting-edge applications of future embedded systems demand highest processor performance with low power consumption to get acceptable battery-life times. Therefore, low power opt...
Anupam Chattopadhyay, B. Geukes, David Kammler, Er...
CHI
2010
ACM
15 years 4 months ago
Learning basic dance choreographies with different augmented feedback modalities
We plan to evaluate different kinds of augmented feedback (tactile, video, sound) for learning basic dance choreographies. Therefore we develop a dance training system based on mo...
Dieter Drobny, Jan Borchers