115 search results - page 17 / 23 » Hardware synthesis from protocol specifications in LOTOS |
ASPDAC
1995
ACM
15 years 1 months ago
1995
ACM
- In this paper, we present a new scheduling algorithms that generates area-efficient register transfer level datapaths with multiport memories. The proposed scheduling algorithm a...
ICCAD
2007
IEEE
15 years 3 months ago
2007
IEEE
—In latency-insensitive design shell modules are used to encapsulate system components (pearls) in order to interface them with the given latency-insensitive protocol and dynamic...
DATE
2009
IEEE
15 years 1 months ago
2009
IEEE
Traditional digital circuit synthesis flows start from an HDL behavioral definition and assume that circuit functions are almost completely defined, making don't-care conditio...
FMICS
2010
Springer
14 years 10 months ago
2010
Springer
Abstract. The FlexRay standard, developed by a cooperation of leading companies in the automotive industry, is a robust communication protocol for distributed components in modern ...
75
Voted
ACSD
2007
IEEE
15 years 1 months ago
2007
IEEE
Synthesis of asynchronous circuits from Signal Transition Graphs (STGs) involves resolution of state encoding conflicts by means of refining the STG specification. In this paper, ...