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129
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ARC
2008
Springer
104views Hardware» more  ARC 2008»
15 years 6 months ago
PARO: Synthesis of Hardware Accelerators for Multi-Dimensional Dataflow-Intensive Applications
Abstract. In this paper, we present the PARO design tool for the automated hardware synthesis of massively parallel embedded architectures for given dataflow dominant applications....
Frank Hannig, Holger Ruckdeschel, Hritam Dutta, J&...
119
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ASAP
2007
IEEE
104views Hardware» more  ASAP 2007»
15 years 6 months ago
Hardware Acceleration for 3-D Radiation Dose Calculation
Abstract— The problem of calculating accurate dose distributions lies in the heart of modern radiation therapy for cancer treatment. Software implementations of dose calculation ...
Bo Zhou, Xiaobo Sharon Hu, Danny Z. Chen, Cedric X...
BCS
2008
15 years 5 months ago
A Hardware Relaxation Paradigm for Solving NP-Hard Problems
Digital circuits with feedback loops can solve some instances of NP-hard problems by relaxation: the circuit will either oscillate or settle down to a stable state that represents...
Paul Cockshott, Andreas Koltes, John O'Donnell, Pa...
DAGSTUHL
2007
15 years 5 months ago
A Case for Deconstructing Hardware Transactional Memory Systems
Major hardware and software vendors are curious about transactional memory (TM), but are understandably cautious about committing to hardware changes. Our thesis is that deconstru...
Mark D. Hill, Derek Hower, Kevin E. Moore, Michael...
CATA
2003
15 years 5 months ago
A Genetic Algorithm Approach to Static Task Scheduling in a Reconfigurable Hardware Environment
This paper presents a basic framework for applying static task scheduling techniques to arbitrarily-structured task systems whose targeted execution environment is comprised of fi...
Sin Ming Loo, B. Earl Wells, J. D. Winningham