21437 search results - page 117 / 4288 » Hardware |
154
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ISSS
2002
IEEE
15 years 9 months ago
2002
IEEE
ForSyDe (FORmal SYstem DEsign) is a methodology which addresses the design of SoC applications which may contain control as well as data flow dominated parts. Starting with a for...
135
Voted
COMPSAC
2007
IEEE
15 years 8 months ago
2007
IEEE
Hardware/software co-verification is becoming an indispensable tool for building highly trustworthy embedded systems. A stumbling block to effective co-verification using model ch...
166
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FCCM
2009
IEEE
15 years 8 months ago
2009
IEEE
Scheduling and partitioning of task graphs on reconfigurable hardware needs to be carefully carried out in order to achieve the best possible performance. In this paper, we demons...
132
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CODES
2004
IEEE
15 years 8 months ago
2004
IEEE
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification for fast HW/SW cosynthesis. A node in DFG represents a coarse grain block such as FIR and...
176
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ATVA
2006
Springer
15 years 8 months ago
2006
Springer
In this paper, we present and illustrate an approach to compositional reasoning for hardware/software co-verification of embedded systems. The major challenges in compositional rea...