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DATE
2007
IEEE
112views Hardware» more  DATE 2007»
15 years 10 months ago
Compact hardware design of Whirlpool hashing core
Weaknesses have recently been found in the widely used cryptographic hash functions SHA-1 and MD5. A potential alternative for these algorithms is the Whirlpool hash function, whi...
Timo Alho, Panu Hämäläinen, Marko H...
AHS
2006
IEEE
121views Hardware» more  AHS 2006»
15 years 10 months ago
Hardware/Software Coevolution of Genome Programs and Cellular Processors
The application of evolutionary techniques to the design of custom processing elements bears a strong relation to the natural process that led to the co-evolution of cells and gen...
Gianluca Tempesti, Pierre-André Mudry, Guil...
AHS
2006
IEEE
125views Hardware» more  AHS 2006»
15 years 10 months ago
Evolving Hardware with Self-reconfigurable connectivity in Xilinx FPGAs
Randomly connecting networks have proven to be universal computing machines. By interconnecting a set of nodes in a random way one can model very complicated non-linear dynamic sy...
Andres Upegui, Eduardo Sanchez
DELTA
2006
IEEE
15 years 10 months ago
A Hardware Implementation of Layer 2 MPLS
This paper presents a hardware architecture for layer 2 Multi Protocol Label Switching (MPLS). MPLS is a protocol framework used primarily to prioritize internet traffic and impro...
Raymond Peterkin, Dan Ionescu
DSD
2006
IEEE
116views Hardware» more  DSD 2006»
15 years 10 months ago
Hardware/Software Co-design Applied to Reed-Solomon Decoding for the DMB Standard
This paper addresses the implementation of ReedSolomon decoding for battery-powered wireless devices. The scope of this paper is constrained by the Digital Media Broadcasting (DMB...
Arjan C. Dam, Michel G. J. Lammertink, Kenneth C. ...