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EGH
2004
Springer
15 years 8 months ago
Efficient partitioning of fragment shaders for multiple-output hardware
Partitioning fragment shaders into multiple rendering passes is an effective technique for virtualizing shading resource limits in graphics hardware. The Recursive Dominator Split...
Tim Foley, Mike Houston, Pat Hanrahan
FPGA
2000
ACM
128views FPGA» more  FPGA 2000»
15 years 8 months ago
Factoring large numbers with programmable hardware
The fastest known algorithms for factoring large numbers share a core sieving technique. The sieving cores find numbers that are completely factored over a prime base set raised t...
Hea Joung Kim, William H. Mangione-Smith
ECOOP
1995
Springer
15 years 8 months ago
Do Object-Oriented Languages Need Special Hardware Support?
Previous studies have shown that object-oriented programs have different execution characteristics than procedural programs, and that special object-oriented hardware can improve p...
Urs Hölzle, David Ungar
FPL
2008
Springer
157views Hardware» more  FPL 2008»
15 years 6 months ago
Chosen-message SPA attacks against FPGA-based RSA hardware implementations
This paper presents SPA (Simple Power Analysis) attacks against public-key cryptosystems implemented on an FPGA platform. The SPA attack investigates a power waveform generated by...
Atsushi Miyamoto, Naofumi Homma, Takafumi Aoki, Ak...
ERSA
2006
82views Hardware» more  ERSA 2006»
15 years 5 months ago
Cache Architectures for Reconfigurable Hardware
The architecture and use of caches for two-level reconfigurable hardware is studied in this paper. The considered two-level reconfigurable hardware performs ordinary reconfiguratio...
Sebastian Lange, Martin Middendorf