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WSCG
2004
161views more  WSCG 2004»
15 years 5 months ago
Rendering Techniques for Hardware-Accelerated Image-Based CSG
Image-based CSG rendering algorithms for standard graphics hardware rely on multipass rendering that includes reading and writing large amounts of pixel data from and to the frame...
Florian Kirsch, Jürgen Döllner
IJCAI
1997
15 years 5 months ago
Evolvable Hardware for Generalized Neural Networks
This paper describes an evolvable hardware (EHW) system for generalized neural network learning. We have developed an ASIC VLSI chip, which is a building block to configure a scal...
Masahiro Murakawa, Shuji Yoshizawa, Isamu Kajitani...
ISCA
2008
IEEE
143views Hardware» more  ISCA 2008»
15 years 4 months ago
TokenTM: Efficient Execution of Large Transactions with Hardware Transactional Memory
Current hardware transactional memory systems seek to simplify parallel programming, but assume that large transactions are rare, so it is acceptable to penalize their performance...
Jayaram Bobba, Neelam Goyal, Mark D. Hill, Michael...
TODAES
2008
158views more  TODAES 2008»
15 years 4 months ago
Designing secure systems on reconfigurable hardware
The extremely high cost of custom ASIC fabrication makes FPGAs an attractive alternative for deployment of custom hardware. Embedded systems based on reconfigurable hardware integ...
Ted Huffmire, Brett Brotherton, Nick Callegari, Jo...
TC
2002
15 years 4 months ago
ROC-1: Hardware Support for Recovery-Oriented Computing
David L. Oppenheimer, Aaron B. Brown, James Beck, ...