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143
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TCAD
2008
127views more  TCAD 2008»
15 years 4 months ago
Speculative Loop-Pipelining in Binary Translation for Hardware Acceleration
Abstract--Multimedia and DSP applications have several computationally intensive kernels which are often offloaded and accelerated by application-specific hardware. This paper pres...
Sejong Oh, Tag Gon Kim, Jeonghun Cho, Elaheh Bozor...
137
Voted
CHES
2009
Springer
229views Cryptology» more  CHES 2009»
16 years 5 months ago
KATAN and KTANTAN - A Family of Small and Efficient Hardware-Oriented Block Ciphers
Abstract. In this paper we propose a new family of very efficient hardware oriented block ciphers. The family contains six block ciphers divided into two flavors. All block ciphers...
Christophe De Cannière, Orr Dunkelman, Miro...
VLSID
2008
IEEE
128views VLSI» more  VLSID 2008»
16 years 4 months ago
Addressing the Challenges of Synchronization/Communication and Debugging Support in Hardware/Software Cosimulation
With increasing adoption of Electronic System Level (ESL) tools, effective design and validation time has reduced to a considerable extent. Cosimulation is found to be a principal...
Banit Agrawal, Timothy Sherwood, Chulho Shin, Simo...
HPCA
2008
IEEE
16 years 4 months ago
An OS-based alternative to full hardware coherence on tiled CMPs
The interconnect mechanisms (shared bus or crossbar) used in current chip-multiprocessors (CMPs) are expected to become a bottleneck that prevents these architectures from scaling...
Christian Fensch, Marcelo Cintra
SIGMOD
2003
ACM
190views Database» more  SIGMOD 2003»
16 years 4 months ago
Hardware Acceleration for Spatial Selections and Joins
Spatial database operations are typically performed in two steps. In the filtering step, indexes and the minimum bounding rectangles (MBRs) of the objects are used to quickly dete...
Chengyu Sun, Divyakant Agrawal, Amr El Abbadi