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148
Voted
GECCO
2000
Springer
15 years 8 months ago
2000
Springer
This paper presents a novel evolvable hardware framework for the automated design of digital circuits for high performance applications. The technique evolves circuits correspondi...
152
Voted
ICCAD
1995
IEEE
15 years 8 months ago
1995
IEEE
Implementing a built-in self-test by a "test per clock" scheme offers advantages concerning fault coverage, detection of delay faults, and test application time. Such a ...
137
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CONEXT
2008
ACM
15 years 6 months ago
2008
ACM
Modern commodity hardware architectures, with their multiple multi-core CPUs and high-speed system interconnects, exhibit tremendous power. In this paper, we study performance lim...
142
Voted
FPL
2008
Springer
15 years 6 months ago
2008
Springer
This paper presents the design and implementation of BORPH's kernel file system layer that provides FPGA processes direct access to the general file system. Using a semantics...
128
Voted
APPINF
2003
15 years 6 months ago
2003
There exist a lot of models of parallel computation, amongst which LogP and LogGP are famous and suitable to describe the framework of communication process of Beowulf LINUX Clust...