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174
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TC
2008
15 years 4 months ago
High-Performance Designs for Linear Algebra Operations on Reconfigurable Hardware
Numerical linear algebra operations are key primitives in scientific computing. Performance optimizations of such operations have been extensively investigated. With the rapid adva...
Ling Zhuo, Viktor K. Prasanna
VLSISP
2008
140views more  VLSISP 2008»
15 years 4 months ago
Regular Expression Matching in Reconfigurable Hardware
In this paper we describe a regular expression pattern matching approach for reconfigurable hardware. Following a Non-deterministic Finite Automata direction, we introduce three ne...
Ioannis Sourdis, João Bispo, João M....
CEE
2004
205views more  CEE 2004»
15 years 4 months ago
64-bit Block ciphers: hardware implementations and comparison analysis
A performance comparison for the 64-bit block cipher (Triple-DES, IDEA, CAST-128, MISTY1, and KHAZAD) FPGA hardware implementations is given in this paper. All these ciphers are u...
Paris Kitsos, Nicolas Sklavos, Michalis D. Galanis...
INTEGRATION
2000
71views more  INTEGRATION 2000»
15 years 4 months ago
A hardware implementation of realloc function
The memory intensive nature of object-oriented languages such as C++ and Java has created the need of a high-performance dynamic memory management. Objectoriented applications oft...
Witawas Srisa-an, Chia-Tien Dan Lo, J. Morris Chan...
131
Voted
MICRO
2002
IEEE
131views Hardware» more  MICRO 2002»
15 years 4 months ago
Protocol Wrappers for Layered Network Packet Processing in Reconfigurable Hardware
abstracting the operation of lower-level packet processing functions. The library synthesizes into field-programmable gate array (FPGA) logic and is utilized in a network platform ...
Florian Braun, John W. Lockwood, Marcel Waldvogel