at their abstractions are similar to data types and operations supplied by conventional processors. A core principle of BCPL is its memory model: an The Challenges of Synthesizing ...
We present a denotational semantics for the hardware compilation language Handel-C that maps language constructs to a set of equations, which describe the structure of the resulti...
This paper presents a multi-language framework to FPGA hardware development which aims to satisfy the dual requirement of high level hardware design and efficient hardware impleme...
Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. One bit transform (1BT) based ME algorithms have low computat...
In this paper, we present a hardware solution to perform non cache-line aligned memory copies allowing the commonly used memcpy function to cope with word copies. The main purpose...