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SCCC
2008
IEEE
15 years 10 months ago
Hardware Synthesis for Asynchronous Communications Mechanisms
Asynchronous data communication mechanisms (ACMs) have been extensively studied as data connectors between independently timed concurrent processes. In this work an automatic meth...
Kyller Costa Gorgônio, Jordi Cortadella
VTC
2008
IEEE
15 years 10 months ago
Hardware Simulator for MIMO Radio Channels: Design and Features of the Digital Block
– This paper presents the realization of the digital block of a hardware simulator of MIMO propagation channels for UMTS and WLAN applications. The hardware simulator must reprod...
Sylvie Picol, Gheorghe Zaharia, Dominique Houzet, ...
FCCM
2007
IEEE
86views VLSI» more  FCCM 2007»
15 years 10 months ago
Writing Portable Applications that Dynamically Bind at Run Time to Reconfigurable Hardware
Nicholas Moore, Albert Conti, Miriam Leeser, Lauri...
FPL
2007
Springer
105views Hardware» more  FPL 2007»
15 years 10 months ago
An Execution Model for Hardware/Software Compilation and its System-Level Realization
We introduce a new execution model for orchestrating the interaction between the conventional processor and the reconfigurable compute unit in adaptive computer systems. We then ...
Holger Lange, Andreas Koch
ASAP
2006
IEEE
169views Hardware» more  ASAP 2006»
15 years 10 months ago
A Design Methodology for Hardware Acceleration of Adaptive Filter Algorithms in Image Processing
Massively parallel processor array architectures can be used as hardware accelerators for a plenty of dataflow dominant applications. Bilateral filtering is an example of a stat...
Hritam Dutta, Frank Hannig, Jürgen Teich, Ben...