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ASAP
2000
IEEE
121views Hardware» more  ASAP 2000»
15 years 8 months ago
A Hardware Algorithm for Variable-Precision Logarithm
This paper presents an e cient hardware algorithm for variable-precision logarithm. The algorithm uses an iterative te chnique that employs table lookups and polynomial approximat...
Javier Hormigo, Julio Villalba, Michael J. Schulte
ISSS
2000
IEEE
144views Hardware» more  ISSS 2000»
15 years 8 months ago
Efficient Hardware Controller Synthesis for Synchronous Dataflow Graph in System Level Design
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification in system level design. In the presented design methodology, each node of a data flow gra...
Hyunuk Jung, Kangnyoung Lee, Soonhoi Ha
ASPDAC
1999
ACM
98views Hardware» more  ASPDAC 1999»
15 years 8 months ago
A Scheduling Method for Synchronous Communication in the Bach Hardware Compiler
− In this paper, we propose a scheduling method for synchronous communication between threads in the Bach hardware compiler. In this method, all communications are extracted from...
Ryoji Sakurai, Mizuki Takahashi, Andrew Kay, Akihi...
FSE
2004
Springer
123views Cryptology» more  FSE 2004»
15 years 7 months ago
ICEBERG : An Involutional Cipher Efficient for Block Encryption in Reconfigurable Hardware
Abstract. We present a fast involutional block cipher optimized for reconfigurable hardware implementations. ICEBERG uses 64-bit text blocks and 128-bit keys. All components are in...
François-Xavier Standaert, Gilles Piret, Ga...
WCE
2007
15 years 5 months ago
The Jacobi Method in Reconfigurable Hardware
—Linear equations provide useful tools for understanding the behavior of a wide variety of phenomena— from science and engineering to social sciences. A number of techniques ha...
Safaa J. Kasbah, Issam W. Damaj