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IAJIT
2006
145views more  IAJIT 2006»
15 years 4 months ago
Fast 160-Bits GF (P) Elliptic Curve Crypto Hardware of High-Radix Scalable Multipliers
In this paper, a fast hardware architecture for elliptic curve cryptography computation in Galois Field GF(p) is proposed. The architecture is implemented for 160-bits, as its dat...
Adnan Abdul-Aziz Gutub
WDAG
2010
Springer
216views Algorithms» more  WDAG 2010»
15 years 1 months ago
A Scalable Lock-Free Universal Construction with Best Effort Transactional Hardware
The imminent arrival of best-effort transactional hardware has spurred new interest in the construction of nonblocking data structures, such as those that require atomic updates to...
Francois Carouge, Michael F. Spear
CGO
2008
IEEE
15 years 10 months ago
Modulo scheduling for highly customized datapaths to increase hardware reusability
In the embedded domain, custom hardware in the form of ASICs is often used to implement critical parts of applications when performance and energy efficiency goals cannot be met ...
Kevin Fan, Hyunchul Park, Manjunath Kudlur, Scott ...
DATE
2010
IEEE
144views Hardware» more  DATE 2010»
15 years 9 months ago
A reconfigurable hardware for one bit transform based multiple reference frame Motion Estimation
—Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. One bit transform (1BT) based ME algorithms have low comput...
Abdulkadir Akin, G. Sayilar, Ilker Hamzaoglu
ISCA
2010
IEEE
170views Hardware» more  ISCA 2010»
15 years 9 months ago
Relax: an architectural framework for software recovery of hardware faults
As technology scales ever further, device unreliability is creating excessive complexity for hardware to maintain the illusion of perfect operation. In this paper, we consider whe...
Marc de Kruijf, Shuou Nomura, Karthikeyan Sankaral...