We present an architecture and hardware for scheduling gigabit packet streams in server clusters that combines a Network Processor datapath and an FPGA for use in server NICs and ...
The computer systems security arms race between attackers and defenders has largely taken place in the domain of software systems, but as hardware complexity and design processes ...
Matthew Hicks, Murph Finnicum, Samuel T. King, Mil...
Today's processors provide a rich source of statistical information on program execution characteristics through hardware counters. However, traditionally, operating system (...
How can Alice trust computation occurring at Bob's computer? Since it exists and is becoming ubiquitous, the current-generation TCPA/TCG hardware might enable a solution. Whe...
John Marchesini, Sean W. Smith, Omen Wild, Joshua ...
We present a new technique for compiling run-time reconfigurable hardware designs. Run-time reconfigurable embedded systems can deliver promising benefits over implementations in ...