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145
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TCAD
2008
110views more  TCAD 2008»
15 years 2 months ago
A Reactive and Cycle-True IP Emulator for MPSoC Exploration
The design of MultiProcessor Systems-on-Chip (MPSoC) emphasizes intellectual-property (IP)-based communication-centric approaches. Therefore, for the optimization of the MPSoC inte...
Shankar Mahadevan, Federico Angiolini, Jens Spars&...
MASCOTS
2010
15 years 1 months ago
Efficient Web Requests Scheduling Considering Resources Sharing
Requests scheduling in Web servers is a hot research topic. Many works aim at providing optimal algorithms according to various metrics. Most of these works are based on classical ...
Simon Duquennoy, Gilles Grimaud
131
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ICCAD
2007
IEEE
111views Hardware» more  ICCAD 2007»
16 years 15 days ago
Exploiting STI stress for performance
— Starting at the 65nm node, stress engineering to improve performance of transistors has been a major industry focus. An intrinsic stress source – shallow trench isolation –...
Andrew B. Kahng, Puneet Sharma, Rasit Onur Topalog...
JACM
2006
98views more  JACM 2006»
15 years 3 months ago
Distribution sort with randomized cycling
Parallel independent disks can enhance the performance of external memory (EM) algorithms, but the programming task is often di cult. In this paper we develop randomized variants ...
Jeffrey Scott Vitter, David A. Hutchinson
138
Voted
SIGGRAPH
2010
ACM
15 years 8 months ago
Feature-based locomotion controllers
This paper introduces an approach to control of physics-based characters based on high-level features of movement, such as centerof-mass, angular momentum, and end-effectors. Obje...
Martin de Lasa, Igor Mordatch, Aaron Hertzmann