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EURODAC
1994
IEEE
127views VHDL» more  EURODAC 1994»
15 years 5 months ago
Optimal equivalent circuits for interconnect delay calculations using moments
In performance-driven interconnect design, delay estimators are used to determine both the topology and the layout of good routing trees. We address the class of moment-matching, ...
Sudhakar Muddu, Andrew B. Kahng
ESOA
2006
15 years 5 months ago
A Decentralised Car Traffic Control System Simulation Using Local Message Propagation Optimised with a Genetic Algorithm
This paper describes a car traffic control simulation realised in a decentralised way by message propagations: congested nodes (roads intersections) send speed-up or slow-down mess...
Martin Kelly, Giovanna Di Marzo Serugendo
DAC
2000
ACM
15 years 5 months ago
An asymptotically constant, linearly bounded methodology for the statistical simulation of analog circuits including component m
Abstract: This paper presents a new statistical methodology to simulate the effect of both inter-die and intra-die variation on the electrical performance of analog integrated circ...
Carlo Guardiani, Sharad Saxena, Patrick McNamara, ...
CGO
2007
IEEE
15 years 7 months ago
Microarchitecture Sensitive Empirical Models for Compiler Optimizations
This paper proposes the use of empirical modeling techniques for building microarchitecture sensitive models for compiler optimizations. The models we build relate program perform...
Kapil Vaswani, Matthew J. Thazhuthaveetil, Y. N. S...
WSC
2008
15 years 3 months ago
A dynamic crashing method for project management using simulation-based optimization
A dynamic simulation-based crashing method is introduced in this research to evaluate project networks and determine the optimum crashing configuration that minimizes the average ...
Michael E. Kuhl, Radhames A. Tolentino-Pena