In this paper, we present test generation procedures to improve scan chain failure diagnosis. The proposed test generation procedures improve diagnostic resolution by using multi-...
Xun Tang, Ruifeng Guo, Wu-Tung Cheng, Sudhakar M. ...
Functional verification is one of the major bottlenecks in microprocessor design. Simulation-based techniques are the most widely used form of processor verification. Efficient ...
This paper presents a new tool for the automatic generation of highly parallelized Finite Impulse Response (FIR) filters. In this approach we follow our PARO design methodology. P...
Holger Ruckdeschel, Hritam Dutta, Frank Hannig, J&...
Abstract. The aim of this paper is to explore some features of the functional test generation problem, and on the basis of the gained experience, to propose a practical method for ...
Eduardas Bareisa, Vacius Jusas, Kestutis Motiejuna...
In this work, we present an algorithm for simultaneous template generation and matching. The algorithm profiles the graph and iteratively contracts edges to create the templates. ...
Ryan Kastner, Seda Ogrenci Memik, Elaheh Bozorgzad...