Although it is common in large Java programs to rethrow exceptions, existing exception-flow analyses find only single exceptionflow links, thus are unable to identify multiple-lin...
State-equivalence based reduction techniques, e.g. bisimulation minimization, can be used to reduce a state transition system to facilitate subsequent verification tasks. However...
Soft errors in combinational and sequential elements of digital circuits are an increasing concern as a result of technology scaling. Several techniques for gate and latch hardeni...
—Failure mode and effects analysis (FMEA) is a technique to reason about possible system hazards that result from system or system component failures. Traditionally, FMEA does no...
Husain Aljazzar, Manuel Fischer, Lars Grunske, Mat...
Abstract. Contemporary high-end Terascale and Petascale systems are composed of hundreds of thousands of commodity multi-core processors interconnected with high-speed custom netwo...
Heike Jagode, Jack Dongarra, Sadaf R. Alam, Jeffre...