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» Heterogeneous systems on chip and systems in package
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GLVLSI
2005
IEEE
120views VLSI» more  GLVLSI 2005»
15 years 3 months ago
3D module placement for congestion and power noise reduction
3D packaging via System-On-Package (SOP) is a viable alternative to System-On-Chip (SOC) to meet the rigorous requirements of today’s mixed signal system integration. In this wo...
Jacob R. Minz, Sung Kyu Lim, Cheng-Kok Koh
ASPDAC
2009
ACM
115views Hardware» more  ASPDAC 2009»
15 years 4 months ago
Prototyping pipelined applications on a heterogeneous FPGA multiprocessor virtual platform
— Multiprocessors on a chip are the reality of these days. Semiconductor industry has recognized this approach as the most efficient in order to exploit chip resources, but the ...
Antonino Tumeo, Marco Branca, Lorenzo Camerini, Ma...
DATE
2006
IEEE
154views Hardware» more  DATE 2006»
15 years 3 months ago
An integrated open framework for heterogeneous MPSoC design space exploration
In recent years, increasing manufacturing density has allowed the development of Multi-Processor Systems-on-Chip (MPSoCs). Application-Specific Instruction Set Processors (ASIPs)...
Federico Angiolini, Jianjiang Ceng, Rainer Leupers...
80
Voted
DATE
2009
IEEE
138views Hardware» more  DATE 2009»
15 years 4 months ago
Hardware/software co-design architecture for thermal management of chip multiprocessors
—The sustained push for performance, transistor count, and instruction level parallelism has reached a point where chip level power density issues are at the forefront of design ...
Omer Khan, Sandip Kundu
DATE
2005
IEEE
100views Hardware» more  DATE 2005»
14 years 11 months ago
The Role of Model-Level Transactors and UML in Functional Prototyping of Systems-on-Chip: A Software-Radio Application
Developing a functional prototype of a system-on-chip provides a unifying vehicle for model validation and system refinement. Keeping the prototype executable everal abstraction l...
Alexandre Chureau, Yvon Savaria, El Mostapha Aboul...