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» Heterogeneous systems on chip and systems in package
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DATE
2006
IEEE
119views Hardware» more  DATE 2006»
15 years 3 months ago
Performance evaluation for system-on-chip architectures using trace-based transaction level simulation
The ever increasing complexity and heterogeneity of modern System-on-Chip (SoC) architectures make an early and systematic exploration of alternative solutions mandatory. Efficien...
Thomas Wild, Andreas Herkersdorf, Rainer Ohlendorf
DATE
2006
IEEE
128views Hardware» more  DATE 2006»
15 years 3 months ago
Efficient link capacity and QoS design for network-on-chip
This paper addresses the allocation of link capacities in the automated design process of a network-on-chip based system. Communication resource costs are minimized under Quality-...
Zvika Guz, Isask'har Walter, Evgeny Bolotin, Israe...
HPCA
2008
IEEE
15 years 10 months ago
System level analysis of fast, per-core DVFS using on-chip switching regulators
Portable, embedded systems place ever-increasing demands on high-performance, low-power microprocessor design. Dynamic voltage and frequency scaling (DVFS) is a well-known techniq...
Wonyoung Kim, Meeta Sharma Gupta, Gu-Yeon Wei, Dav...
DAC
2007
ACM
15 years 10 months ago
Trusted Hardware: Can It Be Trustworthy?
Processing and storage of confidential or critical information is an every day occurrence in computing systems. The trustworthiness of computing devices has become an important co...
Cynthia E. Irvine, Karl N. Levitt
FBIT
2007
IEEE
15 years 3 months ago
A Neurostimulator Design for Long-term Animal Experiments
This article reports on a neural prosthesis stimulation system for long-term use in animal electrical stimulation experiments. The presented system consists of an implantable stim...
Jingai Zhou, Se Joon Woo, Se Ik Park, Seung Woo Le...