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DATE
2000
IEEE
87views Hardware» more  DATE 2000»
15 years 1 months ago
Test Synthesis for Mixed-Signal SOC Paths
Higher levels of integration, the need for test re-use, and the mixed-signal nature of today’s SOC’s necessitate hierarchical test generation and system level test composition...
Sule Ozev, Ismet Bayraktaroglu, Alex Orailoglu
101
Voted
ISORC
1999
IEEE
15 years 1 months ago
v-Promela: A Visual, Object-Oriented Language for SPIN
We describe the design of VIP, a graphical front-end to the model checker SPIN. VIP supports a visual formalism, called v-Promela that connects the model checker to modern hierarc...
Stefan Leue, Gerard J. Holzmann
EMNLP
2011
13 years 9 months ago
Heuristic Search for Non-Bottom-Up Tree Structure Prediction
State of the art Tree Structures Prediction techniques rely on bottom-up decoding. These approaches allow the use of context-free features and bottom-up features. We discuss the l...
Andrea Gesmundo, James Henderson
TSE
2008
97views more  TSE 2008»
14 years 9 months ago
Timed Automata Patterns
Timed Automata have proven to be useful for specification and verification of real-time systems. System design using Timed Automata relies on explicit manipulation of clock variabl...
Jin Song Dong, Ping Hao, Shengchao Qin, Jun Sun 00...
SSIAI
2000
IEEE
15 years 1 months ago
Morphological Pyramid Image Registration
We proposed an intensity-based morphological pyramid image registration algorithm. This approach utilizes the global affine transformation model, also considering radiometric chan...
Zhongxiu Hu, Scott T. Acton